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Submitted by: DAVID SMITH
A genre of integrated circuit which is intended to be configured by a designer or the customer is called FPGA (Field-Programmable Gate Array). It is entitled as field-programmable because FPGAs are configured after manufacturing. Usually a Hardware Description Language (HDL) is used to specify FPGA configuration which is analogous to that utilized in an application-specific integrated circuit (ASIC). (Circuit diagrams were used in the past to specify the configuration, as they were for ASICs, but this is progressively uncommon.
FPGAs comprise a layout of programmable logic blocks and a hierarchy of re-configurable interconnects that allow the blocks to be “wired together”, like different logic gates that can be inter-wired in various configurations. It is possible to configure logic blocks to execute complex combinational functions, or just uncomplicated logic gates like AND and XOR. In most FPGAs, logic blocks also comprehend memory elements, which can be simple flip-flops or more completed blocks of memory.
For implementing complex digital computations, contemporaneous field-programmable gate arrays (FPGAs) have huge resources of logic gates and RAM blocks. It turns into a challenge to confirm accurate timing of valid data within setup time and hold time because FPGA designs employ very fast I/Os and bidirectional data buses.
Contemporaneous field-programmable gate arrays (FPGAs) have huge provision of logic gates and RAM blocks to execute complicated digital calculations. It is a challenge to verify right timing of valid data within setup time and hold time because FPGA designs employ very fast I/Os and bidirectional data buses. For meeting these time constraints, floor planning enables resources allocation. FPGAs can be used to implement any logical function that an ASIC could perform. The ability to update the functionality after shipping, partial re-configuration of a portion of the design and the low non-recurring engineering costs relative to an ASIC design (notwithstanding the generally higher unit cost), offer advantages for many applications.
Some FPGAs have analog features in addition to digital functions. The most common analog feature is programmable slew rate and drive strength on each output pin, allowing the engineer to set slow rates on lightly loaded pins that would otherwise ring or couple unacceptably, and to set stronger, faster rates on heavily loaded pins on high-speed channels that would otherwise run too slowly. Another relatively common analog feature is differential comparators on input pins designed to be connected to differential signaling channels. A few “mixed signal FPGAs” have integrated peripheral analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) with analog signal conditioning blocks allowing them to operate as a system-on-a-chip. Such devices blur the line between an FPGA, which carries digital ones and zeros on its internal programmable interconnect fabric, and field-programmable analog array (FPAA), which carries analog values on its internal programmable interconnect fabric.
From technical aspect, any computable problem can be solved using an FPGA. It is trivially cleared by the reality that a soft microprocessor can be implemented by FPGA. Their benefit keeps in that they are sometimes notably quicker for a number of applications because of their parallel characteristic and optimality in terms of the number of gates utilized for a particular method.
About the Author: David Smith, Senior Vice President of
USComponent.com
, an IGBT power transistor module distributor since 2001.
Source:
isnare.com
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